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Embedded ACPI Compliant DDR Power
Generation Using the ISL6532A
Application Note
November 2003
AN1056
Author: Douglas Mattingly
Introduction
The ISL6532A provides a complete ACPI compliant power
solution for dual channel DDRI and DDRII Memory systems.
Recommended Test Equipment
To test the full functionality of the ISL6532A, the following
equipment is recommended:
Included are both a synchronous buck controller and
integrated LDO to supply VDDQ with high current during
S0/S1 (Run) states and standby current during S3 (Suspend-
To-RAM = STR) state. During Run mode, a fully integrated
sink-source regulator generates an accurate (VDDQ/2) high
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An ATX power supply (minimum 160W configuration)
Three electronic loads
Four channel oscilloscope with probes
Precision digital multimeters
current VTT voltage. A buffered version of the VDDQ/2
reference is provided as V REF . The ISL6532A also features
VDDQ overcurrent protection and an internal LDO controller
for production of 1.5V Video and Core Voltages.
The ISL6532A contains high performance error amplifiers, a
high accuracy reference, an internal 50% tracking reference,
a fixed 250kHz internal oscillator, overcurrent protection for
the VDDQ regulator utilizing the control MOSFET r DS(ON)
and Power Good indication. All these features are packaged
in a 28-Lead 6x6mm QFN. A more complete description of
the IC can be found in the datasheet[1].
Reference Design
The ISL6532AEVAL1 is an evaluation board that highlights the
operation of the ISL6532A in an embedded DDR DRAM
Memory Power application. The V DDQ supply has been
designed to supply 2.5V at a maximum load of 20A. The V TT
termination supply will track the V DDQ supply at 50% while
sourcing or sinking current. The LDO is designed to supply 1.5V
AGP core voltage. The schematic, Bill of Materials, and Board
Layout for the ISL6532AEVAL1 can be found in the Appendix.
Quick Start Evaluation
The ISL6532AEVAL1 board is shipped ‘ready to use’ right
from the box. The ISL6532AEVAL1 supports testing with
standard laboratory equipment or with an ATX power supply.
All three outputs can be exercised through external loads.
Both the V DDQ and V TT regulators have the ability to source
or sink current while the AGP Linear regulator may only
source current.
There are auxiliary posts available on the board for
introducing power to the board if an ATX supply is not
available. If an ATX supply is used, these posts may be used
to monitor the voltages supplied by the ATX supply. There
are also posts available on each regulated output rail for
drawing a load and/or monitoring the voltages. Ten
individually labeled probe points are also available for use.
These probe points provide Kelvin connections to signals
which may be of interest to the designer.
Three switches have been placed on the board to
accommodate ACPI signal simulation. The ATX switch will
enable or disable the ATX power supply, while the other two
switches will send S5 or S3 signals to the ISL6532A.
If individual power supplies are to be utilized in place of the
ATX power supply, then the 5V power supply should be
capable of producing 15A of continuous current. The supply
for the 5VSBY rail should be capable of producing up to 1A.
A single 5V supply may be used for both VCC5 and 5VSBY.
The 12V supply should be capable of producing at least 1A
of continuous current.
Power and Load Connections
Input Voltages
Simply plug the 20 pin connector from the ATX power supply
into the 20 pin receptacle, J1, on the evaluation board. If
laboratory supplies are to be used, then connect the 5V
supplies to the VCC5 and 5VSBY posts. Connect the 12V
supply to the 12V post. Connect the ground leads of all
supplies to the corresponding GND post directly to the left of
each supply post.
Loading V DDQ
Connect the positive terminal of the first electronic load to
the VDDQ post. Connect the return terminal of the same
load to the corresponding GND post.
Loading V TT - Sourcing Current
To test V TT while the regulator sources current, connect the
positive terminal of the second electronic load to the VTT
post. Connect the return terminal of the same load to the
corresponding GND post.
Loading V TT - Sinking Current
To test V TT while the regulator sinks current, connect the
positive terminal of the second electronic load to the VDDQ post.
Connect the return terminal of the same load to the VTT post.
CAUTION: The return terminal of the load must float for
this to work properly.
Loading V AGP
Connect the positive terminal of the third electronic load to
the 1.5VAGP post. Connect the return terminal of the
corresponding GND post.
Standby 3.3V Generation
The ISL6532AEVAL1 has been designed to generate a
3.3VSBY rail from the 5VSBY input. The 3.3VSBY rail is
used as the input to the standby LDO when the system is in
the Sleep State.
1
1-888-INTERSIL or 321-724-7143
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright ? Intersil Americas Inc. 2003. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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